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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT643 Octal bus transceiver; 3-state; true/inverting
Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; true/inverting
FEATURES * Octal bidirectional bus interface * True and inverting 3-state outputs * Output capability: bus driver * ICC category: MSI GENERAL DESCRIPTION
74HC/HCT643
The 74HC/HCT643 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT643 are octal transceivers featuring true and inverting 3-state bus compatible outputs in both send and receive directions. The "643" features an output enable (OE) input for easy cascading and a send/receive (DIR) for direction control. OE controls the outputs so that the buses are effectively isolated.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay An to Bn; inverting Bn to An; true input capacitance input/output capacitance power dissipation capacitance per transceiver notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 7 8 3.5 10 42 8 11 3.5 10 44 ns ns pF pF pF HCT UNIT
CI CI/O CPD Notes
1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC -1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information".
December 1990
2
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; true/inverting
PIN DESCRIPTION PIN NO. 1 2, 3, 4, 5, 6, 7, 8, 9 10 19 20 SYMBOL NAME AND FUNCTION DIR A0 to A7 GND OE VCC direction control data inputs/outputs ground (0 V) data inputs/outputs output enable input (active LOW) positive supply voltage
74HC/HCT643
18, 17, 16, 15, 14, 13, 12, 11 B0 to B7
Fig.1 Pin configuration.
Fig.2 Logic symbol.
FUNCTION TABLE INPUTS OE L L H Notes 1. H L X Z = HIGH voltage level = LOW voltage level = don't care = high impedance OFF-state DIR L H X INPUTS/OUTPUTS An A=B inputs Z Bn inputs B=A Z
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
December 1990
3
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; true/inverting
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: bus driver ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25 -40 to +85 -40 to +125 max. 135 27 23 135 27 23 225 45 38 225 45 38 90 18 15 ns
74HC/HCT643
TEST CONDITIONS UNIT V CC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Fig.5
min. typ. max. min. max. min. tPHL/ tPLH propagation delay An to Bn; inverting propagation delay Bn to An; non-inverting (true) 3-state output enable time OE, DIR to An; OE, DIR to Bn 3-state output disable time OE, DIR to An; OE, DIR to Bn output transition time 25 9 7 28 10 8 39 14 11 44 16 13 14 5 4 90 18 15 90 18 15 150 30 26 150 30 26 60 12 10 115 23 20 115 23 20 190 38 33 190 38 33 75 15 13
tPHL/ tPLH
ns
Fig.6
tPZH/ tPZL
ns
Fig.7
tPHZ/ tPLZ
ns
Fig.7
tTHL/ tTLH
ns
Fig.5 and Fig.6
December 1990
4
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; true/inverting
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: bus driver ICC category: MSI Note to HCT types
74HC/HCT643
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT An Bn OE DIR
UNIT LOAD COEFFICIENT 1.50 0.40 1.50 0.90
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER +25 -40 to +85 -40 to +125 max. 30 ns 4.5 Fig.5 UNIT V CC WAVEFORMS (V) TEST CONDITIONS
min. typ. max. min. max. min. tPHL/ tPLH propagation delay An to Bn; inverting propagation delay Bn to An; non-inverting (true) 3-state output enable time OE, DIR to An; OE, DIR to Bn 3-state output disable time OE, DIR to An; OE, DIR to Bn output transition time 10 20 25
tPHL/ tPLH
13
23
29
35
ns
4.5
Fig.6
tPZH/ tPZL
16
30
38
45
ns
4.5
Fig.7
tPHZ/ tPLZ
17
30
38
45
ns
4.5
Fig.7
tTHL/ tTLH
5
12
15
18
ns
4.5
Fig.5 and Fig.6
December 1990
5
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; true/inverting
AC WAVEFORMS
74HC/HCT643
(1)
HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
(1)
HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.5
Waveforms showing the input (An) to output (Bn) propagation delays and the output transition times.
Fig.6
Waveforms showing the input (Bn) to output (An) propagation delays and the output transition times.
PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines".
(1)
HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times for OE and DIR inputs.
December 1990
6
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